This invention pertains to slurries, systems and methods used for Chemical Mechanical Polishing or Planarization (CMP) of semiconductor devices, particularly for materials containing tungsten.
Integrated circuits are interconnected through the use of well-known multilevel interconnections. Interconnection structures normally have a first layer of metallization, an interconnection layer, a second level of metallization, and typically third and subsequent levels of metallization. Interlevel dielectric materials such as silicon dioxide and sometimes low-k materials are used to electrically isolate the different levels of metallization in a silicon substrate or well. The electrical connections between different interconnection levels are made through the use of metallized vias and in particular tungsten vias. U.S. Pat. No. 4,789,648 describes a method for preparing multiple metallized layers and metallized vias in insulator films. In a similar manner, metal contacts are used to form electrical connections between interconnection levels and devices formed in a well. The metal vias and contacts are generally filled with tungsten and generally employ an adhesion layer such as titanium nitride (TiN) and/or titanium to adhere a metal layer such as a tungsten metal layer to the dielectric material.
In one semiconductor manufacturing process, metallized vias or contacts are formed by a blanket tungsten deposition followed by a CMP step. In a typical process, via holes are etched through the interlevel dielectric (ILD) to interconnection lines or to a semiconductor substrate. Next, a thin adhesion layer such as titanium nitride and/or titanium is generally formed over the ILD and is directed into the etched via hole. Then, a tungsten film is blanket deposited over the adhesion layer and into the via. The deposition is continued until the via hole is filled with tungsten. Finally, the excess tungsten is removed by CMP to form metal vias.
In another semiconductor manufacturing process, tungsten is used as a gate electrode material in the transistor because of its superior electrical characteristics over poly-silicon which has been traditionally used as gate electrode material, as taught by A. Yagishita et al, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 5, MAY 2000.
In a typical CMP process, the substrate is placed in direct contact with a rotating polishing pad. A carrier applies pressure against the backside of the substrate. During the polishing process, the pad and table are rotated while a downward force is maintained against the substrate back. An abrasive and chemically reactive solution, commonly referred to as a polishing “slurry”, a polishing “composition” or a polishing “formulation”, is deposited onto the pad during polishing, where rotation and/or movement of the pad relative to the wafer brings said slurry into the space between the polishing pad and the substrate surface. The slurry initiates the polishing process by chemically reacting with the film being polished. The polishing process is facilitated by the rotational movement of the pad relative to the substrate as slurry is provided to the wafer/pad interface. Polishing is continued in this manner until the desired film on the insulator is removed. Removal of tungsten in the CMP is believed to be due to synergy between mechanical abrasion and tungsten oxidation followed by dissolution.
One of the commonly encountered problems in CMP in particular in metal applications such as tungsten is dishing. Tungsten CMP slurries have to be formulated such that the dishing can be minimized in order to meet certain design targets critical for a functioning device. In tungsten applications, a certain resistivity is needed for the device to function as designed which required a certain remaining tungsten thickness after the CMP step. If the dishing is too high the remaining W thickness will be too low therefore the resistivity will be too high.
U.S. Pat. No. 6,776,810 describes the use of positively charged polyelectrolytes with a molecular weight of 15,000 or more for the use in CMP slurries with silica or alumina particles for the use on metallic substrates. A variety of different cationic homo- and co-polymers are mentioned in this patent.
U.S. Pat. No. 7,247,567 describes a method of chemically-mechanically polishing a substrate comprising tungsten through use of a composition comprising a tungsten etchant, an inhibitor of tungsten etching, and water, wherein the inhibitor of tungsten polishing is a polymer, copolymer, or polymer blend comprising at least one repeating group comprising at least one nitrogen-containing heterocyclic ring or a tertiary or quaternary nitrogen atom. The invention further provides a chemical-mechanical polishing composition particularly useful in polishing tungsten-containing substrates.
For example, U.S. Pat. No. 8,858,819 describes the use of (polyalkyleneimine), a polymer with a large positive charge density, as an inhibitor in tungsten slurries.
U.S. Pat. No. 8,492,276 describes the use of cationic water-soluble polymers for the use in acidic (pH 1-3) tungsten slurries. A variety of different types of cationic polymers are listed and the formulations were evaluated on patterned wafers. Good performance on topography was reported, however no specific dishing values are provided.
U.S. Pat. No. 6,083,838 describe adding surfactant to CMP slurries to planarize a metal and in particular tungsten surface. In one embodiment, the method comprises selecting a slurry that contains conventional components of an abrasive and an oxidant. The oxidant is known to have a known rate of oxidation and is capable of oxidizing the metal. This embodiment further comprises reducing a rate of exposure of the metal to the oxidant by altering a property of the slurry, oxidizing the metal at the reduced rate to form an oxide of the metal, and removing the oxide with the abrasive to produce a planarized surface of the semiconductor wafer.
There still has been a need for novel CMP slurries, particularly neutral pH tungsten slurries that can reduce dishing while maintain desirable removal rate in polishing.